Gerber issues in board designs

Here are some of the most common errors encountered in our design of Test Hardware boards. These were identified in the gerber review before releasing the gerber files for fabrication.


1. Associated copper


2. Fabrication notes mismatch


3. Tolerance for contactor alignment holes


4. Unused pads removal


5. Routes passing thru copper voids


6. Ground connections

I will be providing discussions on my future posts on each of these items. Feel free to post your comments/ideas/ suggestions.

Altium Designer 10 - Basics - Creating a Circular Polygon Region

The easiest way to create a circular copper polygon or region do the following:

1) Open your PCBLib and a blank PCB file.

2) In the blank PCB draw the desired circular using Place->Full Circle.


3) Select the circle and than go to the Tools->Create Region From Selected Primitives or Create Polygon From Selected Primitives.

4) The inner area will now be converted to a solid region.


5) You can now copy the region and place it into your PCB library.

.IPC Generation using PADS 9.2 Layout

go to Export


· change the “Save as type:” pull down box to IPC356
· Select 356A report.

Below is an explanation for this request:

In the Circuit board layout process, the designer uses a specialized circuit board layout software package such as Allegro, Power PCB, Protel, or OrCAD to generate a design database. In turn the database is directly linked to the engineering schematic of the design. These software applications are capable of generating an IPC-365 net list file which is linked to the schematic. Additionally, these applications output Gerber files (a graphical representation of the circuitry and design). When everything validates, the gerber files 'test clean' to the 'net list' produced from the design database.

Many problems can occur in the layout, post processing, photo plotting of the gerber files or the PCB fabrication process. By allowing the fab supplier to "Check your Gerber files" against the "IPC-356 compliant net list", the fab supplier can catch potential issues in the CAM when preparing the job for fabrication. Plotting or fabrication errors can be caught at electrical test using the provided IPC-356 net list.

When the IPC-356 files are not provided, the fab supplier must extract a net list file from the gerber files that were supplied in order to do a net list test of the bare PCB. This creates a challenge as errors in the gerber files that were provided will not enable the fab supplier to "find the design error" and the net list file that the fab supplier creates will also contain the design error. When design errors occur like this the completed, bare PCB's will test as valid, when they actually contain a built-in "design error."